Layout-Based Digital IC Course Projects in Large Classes: Implementation, Evaluation, and Plagiarism Detection

Autor/inn/en	Davidson, Alfred Festus; Viraraghavan, Janakiraman
Titel	Layout-Based Digital IC Course Projects in Large Classes: Implementation, Evaluation, and Plagiarism Detection
Quelle	In: IEEE Transactions on Education, 66 (2023) 1, S.83-93 (11 Seiten)Infoseite zur Zeitschrift PDF als Volltext Verfügbarkeit
Zusatzinformation	ORCID (Davidson, Alfred Festus) ORCID (Viraraghavan, Janakiraman)
Sprache	englisch
Dokumenttyp	gedruckt; online; Zeitschriftenaufsatz
ISSN	0018-9359
DOI	10.1109/TE.2022.3192624
Schlagwörter	Design; Electronic Equipment; Student Projects; Large Group Instruction; Class Size; Plagiarism; Manufacturing + Suchen Sie Ihr Suchwort? Elektronisches Gerät; Schulprojekt; Klassengröße; Plagiat; Herstellung
Abstract	Contribution: The ability to design circuit layouts is a critical component of circuit design. This article presents an approach wherein layout-based design projects can be integrated into the traditional digital integrated circuit (IC) curriculum targeted at large classes and addresses the relevant challenges. Background: Most circuit design curricula cover aspects of layout design and good layout design practices in some detail, but the actual assignment of layout design is done only in classes with restricted sizes due to various factors, including the lack of propriety software, evaluation, or plagiarism detection strategies. Intended Outcomes: To be able to integrate layout-based design projects into the digital IC curriculum targeting large classes. Application Design: Freely available and opensource tools were used for the projects. Additional tool features were repurposed for plagiarism detection. Findings: Feedback collected from the students and quiz performance indicate a marked increase in meeting the learning objectives with the inclusion of layout-based projects. The proposed plagiarism detection strategy successfully identified instances of plagiarism. (As Provided).
Anmerkungen	Institute of Electrical and Electronics Engineers, Inc. 445 Hoes Lane, Piscataway, NJ 08854. Tel: 732-981-0060; Web site: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=13
Erfasst von	ERIC (Education Resources Information Center), Washington, DC
Update	2024/1/01